ternary-logic/RMOS, branch master

ternary-logic/RMOS, branch master Ternary logic gate schematics Old uncommitted changes 2016-12-15T03:26:29+00:00 Jed Barber jjbarber@y7mail.com 2016-12-15T03:26:29+00:00 76682bade38a8b2d58490ddbb80cb627a2b2ad1b

Constructed RMOS EQUALITY, SUM, XOR gates 2014-03-01T07:27:16+00:00 Jed Barber jjbarber@y7mail.com 2014-03-01T07:27:16+00:00 9a13d5cc14326573c1908f7b9bbb1d06a9f900b5

Removed unuseful symbols 2014-02-28T08:08:18+00:00 Jed Barber jjbarber@y7mail.com 2014-02-28T08:08:18+00:00 905945f2bfd087251f2acef2c3b23f0040c58099

Constructed CONS, GULL, MAX, MIN gates 2014-02-28T08:07:46+00:00 Jed Barber jjbarber@y7mail.com 2014-02-28T08:07:46+00:00 0e651b2b27f19de6bddf523ab6627e80dfb16975

Constructed RMOS INC, DEC, inverting CONS gates 2014-02-28T02:45:16+00:00 Jed Barber jjbarber@y7mail.com 2014-02-28T02:45:16+00:00 ede831e038e8b2278f7d248a1f44af1252bc9fdc

Constructed RMOS buffer, IS gates 2014-02-26T11:54:22+00:00 Jed Barber jjbarber@y7mail.com 2014-02-26T11:54:22+00:00 a2c54bee85f58705e82382fed4a709b3f6f499cf

Added symbols (copies of the CMOS symbols) 2014-02-26T11:30:51+00:00 Jed Barber jjbarber@y7mail.com 2014-02-26T11:30:51+00:00 029d0d8e09e56ee12c98475d4e98e6388f977922

Removed test voltages, added input/output labels 2014-02-26T11:27:56+00:00 Jed Barber jjbarber@y7mail.com 2014-02-26T11:27:56+00:00 050a580d1d04a4f077f416023581ba4d7cb1f327

Added RMOS clamps, threshold inverters 2014-02-26T02:53:31+00:00 Jed Barber jjbarber@y7mail.com 2014-02-26T02:53:31+00:00 a8c90c73eea0cc51ffce3a5c2622b55f52c36480

Constructed ANTIMAX gate in RMOS 2014-02-24T15:33:01+00:00 Jed Barber jjbarber@y7mail.com 2014-02-24T15:33:01+00:00 da18022a88f411c462fd9ff93757242d0099c557