From 7b1cc49a29825f8875026027e1ae2f44cf009337 Mon Sep 17 00:00:00 2001 From: Jed Barber Date: Fri, 14 Feb 2014 00:36:20 +1100 Subject: Constructed simulated ternary EQUALITY gate --- simulated/equality.asc | 51 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 simulated/equality.asc diff --git a/simulated/equality.asc b/simulated/equality.asc new file mode 100644 index 0000000..cf3927e --- /dev/null +++ b/simulated/equality.asc @@ -0,0 +1,51 @@ +Version 4 +SHEET 1 880 680 +WIRE -112 -16 -160 -16 +WIRE 32 -16 -112 -16 +WIRE 160 32 96 32 +WIRE -48 48 -160 48 +WIRE 32 48 -16 48 +WIRE -48 128 -48 48 +WIRE 32 128 -48 128 +WIRE 160 128 160 32 +WIRE 224 128 160 128 +WIRE 368 144 288 144 +WIRE 224 160 144 160 +WIRE 144 176 144 160 +WIRE 144 176 96 176 +WIRE 368 176 288 176 +WIRE 32 192 -80 192 +WIRE 224 192 160 192 +WIRE -16 272 -16 48 +WIRE -16 272 -160 272 +WIRE 32 272 -16 272 +WIRE -112 288 -112 -16 +WIRE 32 288 -112 288 +WIRE 160 288 160 192 +WIRE 160 288 96 288 +WIRE -48 320 -48 128 +WIRE 32 320 -48 320 +WIRE -80 336 -80 192 +WIRE -80 336 -160 336 +WIRE 32 336 -80 336 +FLAG 368 144 Y- +IOPIN 368 144 Out +FLAG 368 176 Y+ +IOPIN 368 176 Out +FLAG -160 -16 A- +IOPIN -160 -16 In +FLAG -160 48 A+ +IOPIN -160 48 In +FLAG -160 272 B- +IOPIN -160 272 In +FLAG -160 336 B+ +IOPIN -160 336 In +SYMBOL Digital\\and 256 96 R0 +SYMATTR InstName A1 +SYMBOL Digital\\and 64 96 R0 +SYMATTR InstName A2 +SYMBOL Digital\\and 64 -48 R0 +SYMATTR InstName A3 +SYMBOL Digital\\or 64 240 R0 +SYMATTR InstName A4 +TEXT 224 272 Left 0 ;Total = 26 transistors -- cgit