From b95d1ce29a411d4d8a3b762bfa44b828f4dbcc1d Mon Sep 17 00:00:00 2001
From: Jed Barber <jjbarber@y7mail.com>
Date: Thu, 20 Feb 2014 18:41:05 +1100
Subject: Added readme

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 create mode 100644 readme.txt

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+
+Implementations of ternary logic gates as described by Douglas W Jones. All implementations were constructed in LTSpice, and all have matching symbols supplied for use as subcircuits.
+
+For information on the behaviour of the gates, see http://homepage.cs.uiowa.edu/~jones/ternary/logic.shtml
+
+
+
+
+/CMOS
+
+Uses CMOS transistor logic. Custom MOSFETs are employed in order to ensure correct threshold voltages as well as allow the use of P-channel depletion mode MOSFETs.
+
+
+
+
+/RMOS
+
+Uses CMOS transistor logic with resistors to pull the output to the middle logical value where necessary.
+
+
+
+
+/simulated
+
+Ternary values are encoded in a pair of binary values, one to signal whether the ternary value is positive, and one for negative. This gives the mapping:
+
++ -> 01
+0 -> 00
+- -> 10
+
+Gates are then constructed using LTSpice's built in binary logic gate functions. The value of 11 is illegal.
+
-- 
cgit