From 342b3a19fad70c348ecfde9b2ec32932ec6af56d Mon Sep 17 00:00:00 2001 From: Jed Barber Date: Thu, 13 Feb 2014 13:51:56 +1100 Subject: Made symbols for all simulated ternary gates so far --- simulated/negative_threshold_inverter.asy | 32 +++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 simulated/negative_threshold_inverter.asy (limited to 'simulated/negative_threshold_inverter.asy') diff --git a/simulated/negative_threshold_inverter.asy b/simulated/negative_threshold_inverter.asy new file mode 100644 index 0000000..88aa7bd --- /dev/null +++ b/simulated/negative_threshold_inverter.asy @@ -0,0 +1,32 @@ +Version 4 +SymbolType CELL +LINE Normal 32 48 64 48 +LINE Normal -32 48 -48 48 +LINE Normal 32 32 -32 32 +LINE Normal 32 64 32 32 +LINE Normal -32 64 32 64 +LINE Normal -32 32 -32 64 +LINE Normal 32 40 32 48 +LINE Normal 47 48 32 40 +LINE Normal -48 32 -48 48 +LINE Normal -64 32 -48 32 +LINE Normal -48 64 -48 48 +LINE Normal -64 64 -48 64 +LINE Normal 80 32 64 32 +LINE Normal 64 64 64 48 +LINE Normal 80 64 64 64 +LINE Normal 64 32 64 48 +TEXT 0 48 Center 0 NTI +SYMATTR Description Negative threshold inverter +PIN -64 32 NONE 0 +PINATTR PinName A- +PINATTR SpiceOrder 1 +PIN 80 32 NONE 0 +PINATTR PinName Y- +PINATTR SpiceOrder 2 +PIN -64 64 NONE 8 +PINATTR PinName A+ +PINATTR SpiceOrder 3 +PIN 80 64 NONE 8 +PINATTR PinName Y+ +PINATTR SpiceOrder 4 -- cgit