| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2014-01-29 | Added symbol for IS FALSE gate | Jed Barber | |
| 2014-01-29 | Modified circuits to match up to their corresponding symbols | Jed Barber | |
| 2014-01-29 | Fixed symbols to signify that they aren't inverting | Jed Barber | |
| 2014-01-29 | Added symbol for STI gate | Jed Barber | |
| 2014-01-29 | Added symbol for PTI gate | Jed Barber | |
| 2014-01-29 | Added symbol for NTI gate | Jed Barber | |
| 2014-01-29 | Added symbol for 2 input ANTIMIN gate | Jed Barber | |
| 2014-01-29 | Added symbol for 2 input ANTIMAX gate | Jed Barber | |
| 2014-01-29 | Added symbol for 2 input MIN gate | Jed Barber | |
| 2014-01-29 | Added symbol for 2 input MAX gate | Jed Barber | |
| 2014-01-29 | Completed decrement circuit | Jed Barber | |
| 2014-01-28 | Completed increment circuit | Jed Barber | |
| 2014-01-28 | Fixed include statements | Jed Barber | |
| 2014-01-28 | Models for CMOS custom mosfets | Jed Barber | |
| 2014-01-28 | Circuits already constructed | Jed Barber | |
 |
index : ternary-logic | |
| Ternary logic gate schematics | Jed Barber |
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