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author | Jed Barber <jjbarber@y7mail.com> | 2014-01-29 01:29:19 +1100 |
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committer | Jed Barber <jjbarber@y7mail.com> | 2014-01-29 01:29:19 +1100 |
commit | 482fe2f04a7bc87cfd5241645ee31a0eabde6b2f (patch) | |
tree | 16878617eae9492c7487c384ab5080d15d8e3580 | |
parent | bd884cace2eda26a64378b146e65848680e06fbc (diff) |
Added symbol for PTI gate
-rw-r--r-- | CMOS/positive_threshold_inverter.asy | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/CMOS/positive_threshold_inverter.asy b/CMOS/positive_threshold_inverter.asy new file mode 100644 index 0000000..b149977 --- /dev/null +++ b/CMOS/positive_threshold_inverter.asy @@ -0,0 +1,22 @@ +Version 4 +SymbolType CELL +LINE Normal 32 48 64 48 +LINE Normal -32 48 -48 48 +LINE Normal 32 32 -32 32 +LINE Normal 32 64 32 32 +LINE Normal -32 64 32 64 +LINE Normal -32 32 -32 64 +LINE Normal 32 40 32 48 +LINE Normal 47 48 32 40 +TEXT 0 48 Center 0 PTI +WINDOW 0 -15 16 Left 0 +SYMATTR Prefix X +SYMATTR SpiceModel VDD 0 +SYMATTR Description Inverting buffer +SYMATTR SpiceLine VDD=5 SPEED=1.0 TRIPDT=5e-9 +PIN -48 48 NONE 0 +PINATTR PinName A +PINATTR SpiceOrder 1 +PIN 64 48 NONE 0 +PINATTR PinName Y +PINATTR SpiceOrder 2 |