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authorJed Barber <jjbarber@y7mail.com>2014-01-29 01:49:06 +1100
committerJed Barber <jjbarber@y7mail.com>2014-01-29 01:49:06 +1100
commit9af52de002cab985ddcab9dd6558e1060aa50d64 (patch)
treed6ef1073afc2421fc77f675dbf4743019894c1e6
parent27e4214758ecc66a173275deaca2db3a36479e56 (diff)
Added symbol for IS FALSE gate
-rw-r--r--CMOS/is_false.asy21
1 files changed, 21 insertions, 0 deletions
diff --git a/CMOS/is_false.asy b/CMOS/is_false.asy
new file mode 100644
index 0000000..5040804
--- /dev/null
+++ b/CMOS/is_false.asy
@@ -0,0 +1,21 @@
+Version 4
+SymbolType CELL
+LINE Normal 32 48 64 48
+LINE Normal -32 48 -48 48
+LINE Normal 32 32 -32 32
+LINE Normal 32 64 32 32
+LINE Normal -32 64 32 64
+LINE Normal -32 32 -32 64
+LINE Normal 32 40 32 48
+TEXT 0 48 Center 0 =-
+WINDOW 0 -15 16 Left 0
+SYMATTR Prefix X
+SYMATTR SpiceModel VDD 0
+SYMATTR Description Inverting buffer
+SYMATTR SpiceLine VDD=5 SPEED=1.0 TRIPDT=5e-9
+PIN -48 48 NONE 0
+PINATTR PinName A
+PINATTR SpiceOrder 1
+PIN 64 48 NONE 0
+PINATTR PinName Y
+PINATTR SpiceOrder 2