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authorJed Barber <jjbarber@y7mail.com>2014-01-31 04:00:05 +1100
committerJed Barber <jjbarber@y7mail.com>2014-01-31 04:00:05 +1100
commit45d370d43ecae58895ebc35025afe60451627a2a (patch)
treeeb469c265f1c2800613bd9f1a2ecb61552da73db /CMOS
parent608e5b59182144634c82912e52a57393f157518d (diff)
Constructed XOR gate (not working)
Diffstat (limited to 'CMOS')
-rw-r--r--CMOS/xor.asc153
1 files changed, 153 insertions, 0 deletions
diff --git a/CMOS/xor.asc b/CMOS/xor.asc
new file mode 100644
index 0000000..a26aae2
--- /dev/null
+++ b/CMOS/xor.asc
@@ -0,0 +1,153 @@
+Version 4
+SHEET 1 1068 724
+WIRE -432 -224 -480 -224
+WIRE -80 -224 -352 -224
+WIRE 176 -224 -80 -224
+WIRE -480 -192 -480 -224
+WIRE -80 -160 -80 -224
+WIRE 176 -160 176 -224
+WIRE -128 -144 -176 -144
+WIRE 128 -144 80 -144
+WIRE 464 -112 272 -112
+WIRE 736 -112 464 -112
+WIRE 880 -112 736 -112
+WIRE -176 -48 -176 -144
+WIRE -176 -48 -480 -48
+WIRE 16 -48 -176 -48
+WIRE 368 -48 16 -48
+WIRE 80 0 80 -144
+WIRE 80 0 -240 0
+WIRE -80 32 -80 -64
+WIRE 176 32 176 -64
+WIRE 464 32 464 -112
+WIRE 736 32 736 -112
+WIRE -640 48 -720 48
+WIRE -480 48 -480 -48
+WIRE -480 48 -560 48
+WIRE -432 48 -480 48
+WIRE -240 48 -240 0
+WIRE -240 48 -320 48
+WIRE -128 48 -176 48
+WIRE 128 48 80 48
+WIRE 368 112 368 -48
+WIRE 416 112 368 112
+WIRE 688 112 640 112
+WIRE -720 208 -720 48
+WIRE -720 208 -800 208
+WIRE -80 208 -80 128
+WIRE 176 208 176 128
+WIRE 176 208 -80 208
+WIRE 272 208 272 -112
+WIRE 272 208 176 208
+WIRE -800 240 -800 208
+WIRE -80 288 -80 208
+WIRE 176 288 176 208
+WIRE 464 288 464 128
+WIRE 736 288 736 128
+WIRE -720 368 -720 208
+WIRE -640 368 -720 368
+WIRE -480 368 -560 368
+WIRE -432 368 -480 368
+WIRE -176 368 -176 48
+WIRE -176 368 -320 368
+WIRE -128 368 -176 368
+WIRE 80 368 80 48
+WIRE 128 368 80 368
+WIRE 368 368 368 112
+WIRE 416 368 368 368
+WIRE 640 368 640 112
+WIRE 688 368 640 368
+WIRE -480 464 -480 368
+WIRE 80 464 80 368
+WIRE 80 464 -480 464
+WIRE 640 464 640 368
+WIRE 640 464 80 464
+WIRE -80 480 -80 384
+WIRE 176 480 176 384
+WIRE 464 512 464 384
+WIRE 736 512 736 384
+WIRE -240 560 -240 48
+WIRE -128 560 -240 560
+WIRE 16 560 16 -48
+WIRE 128 560 16 560
+WIRE -432 640 -480 640
+WIRE -80 640 -80 576
+WIRE -80 640 -352 640
+WIRE 176 640 176 576
+WIRE 176 640 -80 640
+WIRE -480 672 -480 640
+FLAG -480 -192 0
+FLAG -480 672 0
+FLAG -800 240 0
+FLAG 736 512 0
+FLAG 464 512 0
+SYMBOL pmos -128 -64 M180
+SYMATTR InstName M1
+SYMATTR Value P-ENH
+SYMBOL pmos -128 128 M180
+SYMATTR InstName M2
+SYMATTR Value P-ENH
+SYMBOL pmos 128 -64 M180
+SYMATTR InstName M3
+SYMATTR Value P-ENH
+SYMBOL pmos 128 128 M180
+SYMATTR InstName M4
+SYMATTR Value P-ENH
+SYMBOL nmos -128 288 R0
+SYMATTR InstName M5
+SYMATTR Value N-ENH
+SYMBOL nmos -128 480 R0
+SYMATTR InstName M6
+SYMATTR Value N-ENH
+SYMBOL nmos 128 288 R0
+SYMATTR InstName M7
+SYMATTR Value N-ENH
+SYMBOL nmos 128 480 R0
+SYMATTR InstName M8
+SYMATTR Value N-ENH
+SYMBOL voltage -336 -224 R90
+WINDOW 0 -32 56 VBottom 0
+WINDOW 3 32 56 VTop 0
+WINDOW 123 0 0 Left 0
+WINDOW 39 0 0 Left 0
+SYMATTR InstName V1
+SYMATTR Value 1
+SYMBOL voltage -336 640 R90
+WINDOW 0 -32 56 VBottom 0
+WINDOW 3 32 56 VTop 0
+WINDOW 123 0 0 Left 0
+WINDOW 39 0 0 Left 0
+SYMATTR InstName V2
+SYMATTR Value -1
+SYMBOL ternary-logic\\CMOS\\standard_inverter -384 0 R0
+SYMATTR InstName X1
+SYMBOL ternary-logic\\CMOS\\standard_inverter -384 320 R0
+SYMATTR InstName X2
+SYMBOL voltage -544 48 R90
+WINDOW 0 -32 56 VBottom 0
+WINDOW 3 32 56 VTop 0
+WINDOW 123 0 0 Left 0
+WINDOW 39 0 0 Left 0
+SYMATTR InstName A
+SYMATTR Value -1
+SYMBOL voltage -544 368 R90
+WINDOW 0 -32 56 VBottom 0
+WINDOW 3 32 56 VTop 0
+WINDOW 123 0 0 Left 0
+WINDOW 39 0 0 Left 0
+SYMATTR InstName B
+SYMATTR Value SINE(0 1 2)
+SYMBOL pmos 416 32 R0
+SYMATTR InstName M9
+SYMATTR Value P-DLOW
+SYMBOL pmos 688 32 R0
+SYMATTR InstName M10
+SYMATTR Value P-DLOW
+SYMBOL nmos 416 288 R0
+SYMATTR InstName M11
+SYMATTR Value N-DLOW
+SYMBOL nmos 688 288 R0
+SYMATTR InstName M12
+SYMATTR Value N-DLOW
+TEXT -64 -296 Left 0 !.inc ./custom.mos
+TEXT -820 706 Left 0 !.tran 1