diff options
| author | Jed Barber <jjbarber@y7mail.com> | 2016-12-15 14:26:29 +1100 |
|---|---|---|
| committer | Jed Barber <jjbarber@y7mail.com> | 2016-12-15 14:26:29 +1100 |
| commit | 76682bade38a8b2d58490ddbb80cb627a2b2ad1b (patch) | |
| tree | 2b6aa35854a5a9488e419ddf9792d4037bf697d5 /simulated/equality.asy | |
| parent | 1e7286b071bcb070ddaa95f09d29614bad7a282d (diff) | |
Diffstat (limited to 'simulated/equality.asy')
| -rw-r--r-- | simulated/equality.asy | 82 |
1 files changed, 41 insertions, 41 deletions
diff --git a/simulated/equality.asy b/simulated/equality.asy index 1c81763..8f852e1 100644 --- a/simulated/equality.asy +++ b/simulated/equality.asy @@ -1,41 +1,41 @@ -Version 4 -SymbolType CELL -LINE Normal 48 64 32 64 -LINE Normal 32 64 32 56 -LINE Normal 64 64 48 64 -LINE Normal -32 48 -48 48 -LINE Normal -32 80 -48 80 -LINE Normal 32 32 -32 32 -LINE Normal 32 96 32 32 -LINE Normal -32 96 32 96 -LINE Normal -32 32 -32 96 -LINE Normal -48 32 -48 48 -LINE Normal -64 32 -48 32 -LINE Normal -64 48 -48 48 -LINE Normal -48 96 -48 80 -LINE Normal -64 96 -48 96 -LINE Normal -64 80 -48 80 -LINE Normal 64 48 64 64 -LINE Normal 80 48 64 48 -LINE Normal 80 80 64 80 -LINE Normal 64 80 64 64 -TEXT 1 48 Center 0 = -SYMATTR Description 2-input equality gate -PIN -64 48 NONE 0 -PINATTR PinName A+ -PINATTR SpiceOrder 1 -PIN -64 80 NONE 0 -PINATTR PinName B- -PINATTR SpiceOrder 2 -PIN 80 48 NONE 0 -PINATTR PinName Y- -PINATTR SpiceOrder 3 -PIN -64 32 NONE 8 -PINATTR PinName A- -PINATTR SpiceOrder 4 -PIN -64 96 NONE 8 -PINATTR PinName B+ -PINATTR SpiceOrder 5 -PIN 80 80 NONE 8 -PINATTR PinName Y+ -PINATTR SpiceOrder 6 +Version 4
+SymbolType CELL
+LINE Normal 48 64 32 64
+LINE Normal 32 64 32 56
+LINE Normal 64 64 48 64
+LINE Normal -32 48 -48 48
+LINE Normal -32 80 -48 80
+LINE Normal 32 32 -32 32
+LINE Normal 32 96 32 32
+LINE Normal -32 96 32 96
+LINE Normal -32 32 -32 96
+LINE Normal -48 32 -48 48
+LINE Normal -64 32 -48 32
+LINE Normal -64 48 -48 48
+LINE Normal -48 96 -48 80
+LINE Normal -64 96 -48 96
+LINE Normal -64 80 -48 80
+LINE Normal 64 48 64 64
+LINE Normal 80 48 64 48
+LINE Normal 80 80 64 80
+LINE Normal 64 80 64 64
+TEXT 1 48 Center 0 =
+SYMATTR Description 2-input equality gate
+PIN -64 48 NONE 0
+PINATTR PinName A+
+PINATTR SpiceOrder 1
+PIN -64 80 NONE 0
+PINATTR PinName B-
+PINATTR SpiceOrder 2
+PIN 80 48 NONE 0
+PINATTR PinName Y-
+PINATTR SpiceOrder 3
+PIN -64 32 NONE 8
+PINATTR PinName A-
+PINATTR SpiceOrder 4
+PIN -64 96 NONE 8
+PINATTR PinName B+
+PINATTR SpiceOrder 5
+PIN 80 80 NONE 8
+PINATTR PinName Y+
+PINATTR SpiceOrder 6
|