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authorJed Barber <jjbarber@y7mail.com>2014-02-10 18:59:43 +1100
committerJed Barber <jjbarber@y7mail.com>2014-02-10 18:59:43 +1100
commit3fd1b6fdea0ab69c736eb4775343c95a0a4a26f6 (patch)
tree717fd91a54d369d4df4652c687a8797baabb4ceb /CMOS
parent229aae96c3baad6f424b043c9ff9ce68331d9f1b (diff)
Added symbols for SUM and XOR gates
Diffstat (limited to 'CMOS')
-rw-r--r--CMOS/sum.asy22
-rw-r--r--CMOS/xor.asy22
2 files changed, 44 insertions, 0 deletions
diff --git a/CMOS/sum.asy b/CMOS/sum.asy
new file mode 100644
index 0000000..3ad5226
--- /dev/null
+++ b/CMOS/sum.asy
@@ -0,0 +1,22 @@
+Version 4
+SymbolType CELL
+LINE Normal 48 64 32 64
+LINE Normal 32 64 32 56
+LINE Normal 64 64 48 64
+LINE Normal -32 48 -48 48
+LINE Normal -32 80 -48 80
+LINE Normal 32 32 -32 32
+LINE Normal 32 96 32 32
+LINE Normal -32 96 32 96
+LINE Normal -32 32 -32 96
+TEXT 1 48 Center 0 SUM
+SYMATTR Description SUM gate
+PIN -48 48 NONE 0
+PINATTR PinName A
+PINATTR SpiceOrder 1
+PIN -48 80 NONE 0
+PINATTR PinName B
+PINATTR SpiceOrder 2
+PIN 64 64 NONE 0
+PINATTR PinName Y
+PINATTR SpiceOrder 3
diff --git a/CMOS/xor.asy b/CMOS/xor.asy
new file mode 100644
index 0000000..bdf30a2
--- /dev/null
+++ b/CMOS/xor.asy
@@ -0,0 +1,22 @@
+Version 4
+SymbolType CELL
+LINE Normal 48 64 32 64
+LINE Normal 32 64 32 56
+LINE Normal 64 64 48 64
+LINE Normal -32 48 -48 48
+LINE Normal -32 80 -48 80
+LINE Normal 32 32 -32 32
+LINE Normal 32 96 32 32
+LINE Normal -32 96 32 96
+LINE Normal -32 32 -32 96
+TEXT 1 48 Center 0 XOR
+SYMATTR Description XOR gate
+PIN -48 48 NONE 0
+PINATTR PinName A
+PINATTR SpiceOrder 1
+PIN -48 80 NONE 0
+PINATTR PinName B
+PINATTR SpiceOrder 2
+PIN 64 64 NONE 0
+PINATTR PinName Y
+PINATTR SpiceOrder 3